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Graduate Rotational Program Development Engineer [FPGA]

Kick-start your professional adventure in our R&D Excellence Centers by joining multiple expert teams in an international rotation program. During this 2-year program you will be able to develop your skills at the forefront of leading-edge technology.

40 Stunden pro Woche
Zwischen 58,000€ und 60,000€ pro Jahr

Was du machen wirst:

  • Design, develop, and document FPGA applications for digital signal processing, data processing, and specialized communication protocols.
  • Create and execute comprehensive test benches to validate FPGA design performance, functionality, and timing requirements.
  • Collaborate effectively as part of a multi-disciplinary design team including hardware, software, and system engineers.
  • Participate in design reviews, code reviews, and technical documentation processes to ensure quality deliverables.
  • Optimize FPGA designs for performance, power consumption, and resource utilization.
  • Debug and troubleshoot complex FPGA implementations using industry-standard tools and methodologies.
  • Support product development lifecycle from concept through production, including design verification and validation activities.
  • Leverage modern AI/LLM tools to accelerate design exploration, code generation, debugging, and documentation, increasing overall development effectiveness.

Was wir bieten

  • International R&D Rotations
  • Work with with high-speed serial interfaces (PCIe, Ethernet, USB, etc.).
  • Digital signal processing

Was wir erwarten

  • Masterabschluss
  • FPGA
  • VHDL
  • Timing analysis

Bewerben

Dieser Job passt perfekt zu dir? Dann bewirb dich jetzt und wir werden dich so schnell wie möglich kontaktieren.

Extra Informationen

Required Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Optical Engineering or a related technical field.
  • Minimum B2 in German and fluency in English.
  • Hands-on experience in FPGA design and development.
  • Proficiency in HDL languages (VHDL and/or Verilog).
  • Experience with FPGA development tools.
  • Strong understanding of digital signal processing concepts and implementation.
  • Knowledge of timing analysis, clock domain crossing, and FPGA architecture optimization.
  • Experience with simulation and verification tools.
  • Excellent problem-solving skills and attention to detail.
  • Strong written and verbal communication skills.

Please note - this program starts in July 2027.

To apply, please upload an updated version of your CV, a copy of your grades/transcripts, a cover letter and if you have any letters of recommendation.

Status
Offen
Ausbildungsniveau
Hochschule/Universität
Standort
Eningen & rotations abroad
Arbeitsstunden pro Woche
40
Jobart
Vollzeitstelle
Gehaltsangabe
Zwischen 58,000€ und 60,000€ pro Jahr
Verantwortlich für
Contribute to our solutions which are effectively used in a high variety of industries as we enable our customers to adapt and thrive by transforming complexity through visibility and actionable insight.
Veröffentlicht am
22-10-2026
Tätigkeitsbereich
Technik / Elektronik
Führerschein erforderlich?
Nein
Auto erforderlich?
Nein
Motivationsschreiben erforderlich?
Nein
Sprachkenntnisse
Englisch, Deutsch

Technik Stellenangebote | Vollzeitstelle | Hochschule/Universität

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